The present invention relates to a dual die semiconductor package with an exposed base surface of a lead frame flag. More specifically, the present invention relates to a dual die semiconductor package with an exposed base surface of a lead frame flag and external connections provided by both a grid array and leads.
Semiconductor packages are becoming more complex and a single package can include one or more semiconductor dies that have high processing power. As a result, there is a need for more external connections for each die and in particular the provision of sufficient ground plane connections may be problematic. Furthermore, the increased complexity of semiconductor dice causes undesirable heat generation that must be dissipated by the semiconductor package.